Pyspice translation issue

Trying to address a pyspice translation issue and understand the skidl-> pyspice translation to fix anything else that comes up on my own

#from skidl
from skidl.pyspice import *
print(lib_search_paths)

#from pyspice
from PySpice.Spice.Library import SpiceLibrary
from PySpice.Spice.Netlist import Circuit
from PySpice.Unit import *
WARNING: KICAD_SYMBOL_DIR environment variable is missing, so the default KiCad symbol libraries won't be searched.


{'kicad': ['.'], 'skidl': ['.', '/home/iridium/anaconda3/lib/python3.7/site-packages/skidl/libs'], 'spice': ['.']}

Issue in SKiDl to pyspice netlist generation for ac voltage source

The issue is that the translation from SKiDl is not passing the value for argument ac_magnitude to the generated netlist. Below is the SKiDl construction code and resulting output netlist. Notice that ac_magnitude=5@u_V argument which controls <AC <ACMAG >> values in the sin voltage source has not done anything resulting in a default result of Vinput N1 0 DC 0V AC 1V SIN( ...

reset()
net_1=Net('N1')

#nothing wrong with R; just need for netlist gen
r1=R(value=1@u_Ohm); r1[1, 2]+=net_1, gnd

#issue with with no pass through of `ac_magnitude` to pyspice netlist
vs=SINEV(ac_magnitude=5@u_V,ref='input',  offset=1.65 @ u_V, amplitude=1.65 @ u_V, frequency=100e6); vs['p', '-']+=net_1, gnd

#make netlist
circ=generate_netlist()
print(circ)
.title 
R1 N1 0 1Ohm
Vinput N1 0 DC 0V AC 1V SIN(1.65V 1.65V 100000000.0Hz 0s 0Hz)




No errors or warnings found during netlist generation.

The correct output is shown below where ac_magnitude=5@u_V has set the output to be Vinput N1 0 DC 0V AC 5V SIN(...

#compartive to pyspice generated circuit
circuit = Circuit('half-wave rectification')

#identical cirucit constuctor to one built in SKiDl but built in nativly in pyspice
circuit.R('1', 'N1', circuit.gnd, 1@u_Ω)

source = circuit.SinusoidalVoltageSource('input', 'N1', circuit.gnd, ac_magnitude=5@u_V, offset=1.65 @ u_V, amplitude=1.65 @ u_V, frequency=100e6)

print(circuit)
.title half-wave rectification
R1 N1 0 1Ohm
Vinput N1 0 DC 0V AC 5V SIN(1.65V 1.65V 100000000.0Hz 0s 0Hz)

results of issues

the SPICE ac simulation will not work properly as shown. when doing an ac simulation SPICE after finding the dc operating point will then set all souces with a non zero AC magnitude value to be sinusoide sources. And because of this issue, any voltage source built with SkiDl’s SINEV constructor will have a 1V magnitude SIN voltage. Therefore ac simulations will not be correct as shown below and error will increase with the addition of more sources

#issues this cause
sim=circ.simulator()
ac_vals=sim.ac(start_frequency=100e6@u_Hz, stop_frequency=100e6@u_GHz, number_of_points=1,  variation='lin')
wrong_current=-ac_vals[vs.ref_prefix+vs.ref] 
wrong_current
WaveForm  [1.-0.j]@A
simulator = circuit.simulator(temperature=25, nominal_temperature=25)
analysis = simulator.ac(start_frequency=100e6@u_Hz, stop_frequency=100e6@u_GHz, number_of_points=1,  variation='lin')
correct_current=-analysis['Vinput']
correct_current
WaveForm  [5.-0.j]@A

root cause and fix

the issue seems to be in skidl/skidl/libs/pyspice_sklib.py at approx line 1452 for part SINEV it’s pyspice "kw" is lacking ac_magnitude. This is most likely due to the awkward documentation in pyspice’s PySpice/PySpice/Spice/HighLevelElement.py class SinusoidalVoltageSource which inherits from class SinusoidalMixin which contains the full kw arguments and necessary documentation.

If this is the case and indeed where it needs to be fixed let me know and I will try to get it fixed and look over skidl/skidl/libs/pyspice_sklib.py for any other issue and push the fixes as I find them.

Thanks